The present invention relates generally to volumetric integrated circuits and manufacturing methods therefore and, more specifically, to volumetric integrated circuits including hermetically passivated metallization.
Volumetric integrated circuit assembly processes involves the turning of chips sideways and the bonding of the chips together with a high-temperature adhesive in controlled-spacing chip-chip gaps. Further processing includes the metallization of the new top and bottom surfaces of the resulting assembly and the joining of a top chip and a bottom substrate (or package or circuit board) to the resulting assembly at the top and bottom surface metallization by way of flip-chip joining processes (e.g., with micro-solder bumps). Recently, however, it has been found that the metallizations of the new top and bottom surfaces require hermetic passivation, which leads to passivation cracking as the passivation crosses over the chip-chip gaps, and gap crossing wiring that presents thermal mismatch issues with the adhesive and causes adhesive outgassing.